1. Field of the Invention
The present invention relates to a bonding pad, an active device array substrate having the bonding pad, and a liquid crystal display (LCD) panel having the bonding pad. More particularly, the present invention relates to a bonding pad capable of improving a rate of inspecting and detecting the defects of bonding pad impedance detects.
2. Description of Related Art
An LCD mainly includes an LCD panel and a back light module. The LCD panel is constituted by a thin film transistor (TFT) array substrate, a color filter (CF) substrate, and a liquid crystal layer sandwiched therebetween. Here, the TFT array substrate includes devices, such as TFTs, scan lines, data lines, pixel electrodes, and so forth. Note that end portions of the data lines and end portions of the scan lines are electrically connected to bonding pads, and the bonding pads are electrically connected to driving devices in subsequent processes, such that signals are able to be transmitted from the driving devices to the LCD panel.
In general, an electrical inspection is performed on the devices disposed on the TFT array substrate after the fabrication of the TFT array substrate is completed. Besides, after the TFT array substrate and the CF substrate are assembled to form the LCD panel, the electrical inspection is also performed thereon. Said inspections are conducted by means of the bonding pads located at the end portions of the data lines and the end portions of the scan lines.
The electrical inspection conventionally performed by means of the bonding pads is described hereinafter. FIG. 1A is a top view of a conventional bonding pad. FIG. 1B is a schematic cross-sectional view of the bonding pad depicted in FIG. 1A. Referring to FIGS. 1A and 1B, a bonding pad 100 is electrically connected to a date line 102a or a scan line 102a. The bonding pad 100 includes a metal layer 102, a gate insulating layer 104, and an indium tin oxide (ITO) layer 106. The metal layer 102 is connected to the data line 102a or the scan line 102a. The gate insulating layer 104 is disposed on the metal layer 102 and has an opening 103 exposing the metal layer 102. The ITO layer 106 is foil led on the gate insulating layer 104 and is electrically contacted with the metal layer 102 through the opening 103.
To perform the electrical inspection, a probe 110 is often used to directly contact the ITO layer 106 of the bonding pad 100, so as to input signals to the data line 102a or the scan line 102a through the probe 110 and to further detect whether circuits or devices on a substrate or in a panel are defective or damaged. Given that a poor contact arises between the ITO layer 106 and the metal layer 102 and thereby results in excessive contact impedance, the abnormal impedance can also be detected by way of said inspection.
Nonetheless, if the probe 110 that is controlled in an inappropriate manner pierces the ITO layer 106 and directly contacts the metal layer 102, the signals of the probe 110 will be directly transmitted to the underlying metal layer 102. Thereby, the excessive contact impedance between the ITO layer 106 and the metal layer 102 is unlikely to be detected by way of said inspection. As such, users cannot be aware of the abnormal contact impedance between the metal layer 102 and the ITO layer 106 of the bonding pad 100.